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#ifndef COMPILER_INLINEASMPPC_H
#define COMPILER_INLINEASMPPC_H

#include "compiler/common.h"
#include "compiler/InlineAsm.h"

typedef enum AssemblerType {
    AssemblerType_0,
    AssemblerType_1
} AssemblerType;

enum {
    NO_REG = 0,
    INVALID_PIC_REG = -2
};

extern char asm_alloc_flags[10];
extern Section sm_section;
extern UInt32 cpu;
extern SInt32 fralloc_parameter_area_size;
extern Boolean user_responsible_for_frame;
extern Boolean supports_hardware_fpu;
extern UInt32 assembledinstructions;
extern AssemblerType assembler_type;
extern char volatileasm;
extern Boolean InlineAsm_gccmode;
extern Boolean InlineAsm_labelref;
extern CLabel *pic_base_label;

enum {
    IADirective_Null,
    IADirective_Entry,
    IADirective_FrAlloc,
    IADirective_NoFrAlloc,
    IADirective_FrFree,
    IADirective_Machine,
    IADirective_SmClass,
    IADirective_PicBase
};

enum {
    CPUFLAG_LOW_MASK = 0xFFFFF,
    CPUFLAG_100000 = 0x100000,
    CPUFLAG_200000 = 0x200000,
    CPUFLAG_400000 = 0x400000,
    CPUFLAG_800000 = 0x800000,
    CPUFLAG_1000000 = 0x1000000,
    CPUFLAG_2000000 = 0x2000000,
    CPUFLAG_4000000 = 0x4000000,
    CPUFLAG_8000000 = 0x8000000,
    CPUFLAG_10000000 = 0x10000000,
    CPUFLAG_20000000 = 0x20000000,
    CPUFLAG_40000000 = 0x40000000,
    CPUFLAG_80000000 = 0x80000000
};

#define OPCODE_PART_1(opcode) ( (opcode) >> 26 )
#define OPCODE_PART_2(opcode) ( ((opcode) >> 21) & 0x1F )
#define OPCODE_PART_3(opcode) ( ((opcode) >> 1) & 0x3FF )

enum {
    CPUMask_401 = CPUFLAG_8000000 | 0x40,
    CPUMask_403 = CPUFLAG_8000000 | 0x80,
    CPUMask_50x = CPUFLAG_10000000 | CPUFLAG_80000000 | 0x800,
    CPUMask_55x_56x = CPUFLAG_10000000 | CPUFLAG_80000000 | 0x1000,
    CPUMask_601 = CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_80000000 | 1,
    CPUMask_602 = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_80000000 | 2,
    CPUMask_8240 = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_80000000 | 0x10000,
    CPUMask_8260 = CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | 0x10000,
    CPUMask_603 = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_80000000 | 4,
    CPUMask_604 = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_80000000 | 8,
    CPUMask_740_750 = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_80000000 | 0x2000,
    CPUMask_801_821_860 = CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | 0x10,
    CPUMask_823_850 = CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | 0x20,
    CPUMask_74xx = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_40000000 | CPUFLAG_80000000 | 0x6000,
    CPUMask_All = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_40000000 | CPUFLAG_80000000 | 0xFFFFF,
    CPUMask_Generic = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_40000000 | CPUFLAG_80000000 | 0xE00E
};

extern void InlineAsm_InitializePPC(void);
extern void InlineAsm_Initialize(AssemblerType assemblertype);
extern SInt32 InlineAsm_IsDirective(AssemblerType assemblertype);
extern void InlineAsm_ProcessDirective(SInt32 directive);
extern void InlineAsm_ScanAssemblyDirective(void);
extern void InlineAsm_ScanAssemblyInstruction(void);
extern void InlineAsm_TranslateIRtoPCode(Statement *stmt);
extern const char *InlineAsm_GetMnemonic(InlineAsm *ia);
extern void CodeGen_GetAsmEffects(Statement *stmt, IAEffects *effects);
extern void CodeGen_PropagateIntoAsm(Statement *stmt, Object *obj, ENode *expr);
extern Statement *CodeGen_CopyAsmStat(Statement *stmt);

#endif