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| author | Ash Wolf <ninji@wuffs.org> | 2023-01-13 01:36:56 +0000 |
|---|---|---|
| committer | Ash Wolf <ninji@wuffs.org> | 2023-01-13 01:36:56 +0000 |
| commit | 9d985413ce2b60a1a8cf001913ee8dac81c03aac (patch) | |
| tree | 348ab31884f2dd89d285e06c42e656e35835ff38 /compiler_and_linker/unsorted/InstrSelection.c | |
| parent | 3a6db389b250439a0cce6b45ef1424a5728f5d18 (diff) | |
| download | MWCC-9d985413ce2b60a1a8cf001913ee8dac81c03aac.tar.gz MWCC-9d985413ce2b60a1a8cf001913ee8dac81c03aac.zip | |
fix lots more issues, add endian conversions to ObjGenMachO, add 64-bit kludge to Switch.c
Diffstat (limited to 'compiler_and_linker/unsorted/InstrSelection.c')
| -rw-r--r-- | compiler_and_linker/unsorted/InstrSelection.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/compiler_and_linker/unsorted/InstrSelection.c b/compiler_and_linker/unsorted/InstrSelection.c index 0ea8bf9..e49437f 100644 --- a/compiler_and_linker/unsorted/InstrSelection.c +++ b/compiler_and_linker/unsorted/InstrSelection.c @@ -1757,8 +1757,8 @@ void gen_COND(ENode *expr, short outputReg, short outputRegHi, Operand *output) emitpcode(PC_XOR, reg2, reg1, output->reg); reg3 = outputReg ? outputReg : ALLOC_GPR(); emitpcode(PC_SUBF, reg3, reg1, reg2); - op2.optype = OpndType_GPR; - op2.reg = reg3; + output->optype = OpndType_GPR; + output->reg = reg3; } return; } |