diff options
author | Ash Wolf <ninji@wuffs.org> | 2022-12-29 12:32:55 +0000 |
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committer | Ash Wolf <ninji@wuffs.org> | 2022-12-29 12:32:55 +0000 |
commit | fcfbafff31869ed808bff0639532db1828660e92 (patch) | |
tree | 7425b346b031c4cb47a06250b3f6f950374d44ae /compiler_and_linker/unsorted/InlineAsmPPC.c | |
parent | bc1321735c15104ffad195e1509cab5f3a044260 (diff) | |
download | MWCC-fcfbafff31869ed808bff0639532db1828660e92.tar.gz MWCC-fcfbafff31869ed808bff0639532db1828660e92.zip |
dump lots more code
Diffstat (limited to 'compiler_and_linker/unsorted/InlineAsmPPC.c')
-rw-r--r-- | compiler_and_linker/unsorted/InlineAsmPPC.c | 117 |
1 files changed, 42 insertions, 75 deletions
diff --git a/compiler_and_linker/unsorted/InlineAsmPPC.c b/compiler_and_linker/unsorted/InlineAsmPPC.c index e6e857b..19c8fdc 100644 --- a/compiler_and_linker/unsorted/InlineAsmPPC.c +++ b/compiler_and_linker/unsorted/InlineAsmPPC.c @@ -29,7 +29,7 @@ extern int countexceptionactionregisters(ExceptionAction *); extern void noteexceptionactionregisters(ExceptionAction *, PCodeArg *); char asm_alloc_flags[10]; -unsigned char sm_section; +Section sm_section; UInt32 cpu; SInt32 fralloc_parameter_area_size; Boolean user_responsible_for_frame; @@ -1018,8 +1018,7 @@ static InlineAsm *InlineAsm_ScanAssemblyOperands(IAMnemonic *mnemonic) { op = ia->args; for (format = mnemonic->format; *format; format++) { -#line 1664 - CError_ASSERT(ia->argcount < argcount); + CError_ASSERT(1664, ia->argcount < argcount); if (*format == ',') { eatcommatoken(); @@ -1114,12 +1113,10 @@ static InlineAsm *InlineAsm_ScanAssemblyOperands(IAMnemonic *mnemonic) { code = *format; value = 16; if (code == 'a') { - if (isdigit(format[1])) { + if (isdigit(format[1])) code = *(++format); - } else { -#line 1804 - CError_FATAL(); - } + else + CError_FATAL(1804); } if (isdigit(format[1])) { @@ -1147,10 +1144,8 @@ static InlineAsm *InlineAsm_ScanAssemblyOperands(IAMnemonic *mnemonic) { if (negate) op->u.imm.value = -op->u.imm.value; - if (pcode_check_imm_bits(op->u.imm.value, value, code)) { -#line 1838 - CError_FATAL(); - } + if (pcode_check_imm_bits(op->u.imm.value, value, code)) + CError_FATAL(1838); break; } @@ -1253,8 +1248,7 @@ static InlineAsm *InlineAsm_ScanAssemblyOperands(IAMnemonic *mnemonic) { case 'd': { short effect2; -#line 1971 - CError_ASSERT(format[1] == '('); + CError_ASSERT(1971, format[1] == '('); format++; effect2 = EffectRead; if (format[1] == '=') { @@ -1265,10 +1259,8 @@ static InlineAsm *InlineAsm_ScanAssemblyOperands(IAMnemonic *mnemonic) { format++; } -#line 1983 - CError_ASSERT(format[1] == 'b'); -#line 1985 - CError_ASSERT(format[2] == ')'); + CError_ASSERT(1983, format[1] == 'b'); + CError_ASSERT(1985, format[2] == ')'); format += 2; switch (ia->opcode) { @@ -1385,8 +1377,7 @@ static InlineAsm *InlineAsm_ScanAssemblyOperands(IAMnemonic *mnemonic) { break; default: -#line 2266 - CError_FATAL(); + CError_FATAL(2266); } while (format[1] && strchr("/<>|*", format[1])) { @@ -1410,30 +1401,25 @@ static InlineAsm *InlineAsm_ScanAssemblyOperands(IAMnemonic *mnemonic) { case '<': case '>': case '|': - if (op->type == IAOpnd_Imm) { + if (op->type == IAOpnd_Imm) value = op->u.imm.value; - } else if (op->type == IAOpnd_Reg) { + else if (op->type == IAOpnd_Reg) value = op->u.reg.num; - } else { -#line 2312 - CError_FATAL(); - } + else + CError_FATAL(2312); if (format[1] == 'p') { format++; - if (op[-1].type == IAOpnd_Imm) { + if (op[-1].type == IAOpnd_Imm) value2 = op[-1].u.imm.value; - } else if (op[-1].type == IAOpnd_Reg) { + else if (op[-1].type == IAOpnd_Reg) value2 = op[-1].u.reg.num; - } else { -#line 2322 - CError_FATAL(); - } + else + CError_FATAL(2322); } else if (isdigit(format[1])) { format += pcode_const_from_format(format + 1, &value2); } else { -#line 2327 - CError_FATAL(); + CError_FATAL(2327); } switch (code) { @@ -1450,18 +1436,15 @@ static InlineAsm *InlineAsm_ScanAssemblyOperands(IAMnemonic *mnemonic) { value = value * value2; break; default: -#line 2348 - CError_FATAL(); + CError_FATAL(2348); } - if (op->type == IAOpnd_Imm) { + if (op->type == IAOpnd_Imm) op->u.imm.value = value; - } else if (op->type == IAOpnd_Reg) { + else if (op->type == IAOpnd_Reg) op->u.reg.num = value; - } else { -#line 2355 - CError_FATAL(); - } + else + CError_FATAL(2355); break; } } @@ -1562,8 +1545,7 @@ void InlineAsm_InitializePPC(void) { case CPU_PPC7400: case CPU_PPC7450: cpu = CPUMask_74xx; break; case CPU_Generic: cpu = CPUMask_Generic; break; default: -#line 2613 - CError_FATAL(); + CError_FATAL(2613); } if (copts.altivec_model) @@ -1785,7 +1767,7 @@ void InlineAsm_ProcessDirective(SInt32 directive) { tk = lex(); if (tk == TK_IDENTIFIER) { if (!strcmp(tkidentifier->name, "PR")) - sm_section = 1; + sm_section = SECT_TEXT; else CError_Error(CErrorStr144); } else { @@ -1946,8 +1928,7 @@ static PCode *InlineAsm_TranslateIRtoPCodePPC(InlineAsm *ia, int argcount, UInt8 extra_args -= (ia->argcount - argcount); argcount = ia->argcount; } else { -#line 3317 - CError_FATAL(); + CError_FATAL(3317); } } @@ -2030,10 +2011,8 @@ static PCode *InlineAsm_TranslateIRtoPCodePPC(InlineAsm *ia, int argcount, UInt8 dest->arg = src->u.reg.rclass; dest->data.reg.reg = r20; dest->data.reg.effect = src->u.reg.effect; - if (pc->op == PC_RLWIMI && (dest->data.reg.effect & EffectWrite) && dest->arg == RegClass_GPR && !(dest->data.reg.effect & EffectRead)) { -#line 3442 - CError_FATAL(); - } + if (pc->op == PC_RLWIMI && (dest->data.reg.effect & EffectWrite) && dest->arg == RegClass_GPR && !(dest->data.reg.effect & EffectRead)) + CError_FATAL(3442); if (dest->arg == RegClass_SPR) { int i; @@ -2059,8 +2038,7 @@ static PCode *InlineAsm_TranslateIRtoPCodePPC(InlineAsm *ia, int argcount, UInt8 if (src->u.reg.object) { if (Registers_GetVarInfo(src->u.reg.object)->flags & VarInfoFlag4) { int reg, regHi; -#line 3474 - CError_ASSERT(dest->arg == RegClass_GPR); + CError_ASSERT(3474, dest->arg == RegClass_GPR); regHi = OBJECT_REG_HI(src->u.reg.object); reg = OBJECT_REG(src->u.reg.object); @@ -2113,8 +2091,7 @@ static PCode *InlineAsm_TranslateIRtoPCodePPC(InlineAsm *ia, int argcount, UInt8 break; default: -#line 3528 - CError_FATAL(); + CError_FATAL(3528); } } @@ -2224,8 +2201,7 @@ void InlineAsm_TranslateIRtoPCode(Statement *stmt) { dest = pc->args[0].data.label.label; break; default: -#line 3715 - CError_FATAL(); + CError_FATAL(3715); } if (dest) { @@ -2379,8 +2355,7 @@ static SInt32 InlineAsm_OpcodeSize(InlineAsm *ia) { case PC_STVXL: return 16; default: -#line 3924 - CError_FATAL(); + CError_FATAL(3924); } } else { if (opcodeinfo[ia->opcode].flags & fPCodeFlag80000000) @@ -2397,14 +2372,12 @@ static SInt32 InlineAsm_OpcodeSize(InlineAsm *ia) { case PC_TLBLI: return 4; default: -#line 3941 - CError_FATAL(); + CError_FATAL(3941); } } } -#line 3944 - CError_FATAL(); + CError_FATAL(3944); return 0; } @@ -2474,8 +2447,7 @@ void CodeGen_GetAsmEffects(Statement *stmt, IAEffects *effects) { effects->operands[effects->numoperands].size = op->u.reg.object->type->size; effects->numoperands++; } else { -#line 4051 - CError_FATAL(); + CError_FATAL(4051); } } } @@ -2510,14 +2482,11 @@ void CodeGen_GetAsmEffects(Statement *stmt, IAEffects *effects) { effects->x3 = 1; break; default: -#line 4087 - CError_FATAL(); + CError_FATAL(4087); } -#line 4090 - CError_ASSERT(effects->numoperands <= 16); -#line 4093 - CError_ASSERT(effects->numlabels <= 16); + CError_ASSERT(4090, effects->numoperands <= 16); + CError_ASSERT(4093, effects->numlabels <= 16); } for (i = 0, op = ia->args; i < ia->argcount; i++, op++) { @@ -2538,8 +2507,7 @@ void CodeGen_GetAsmEffects(Statement *stmt, IAEffects *effects) { effects->operands[effects->numoperands].size = op->u.reg.object->type->size; effects->numoperands++; } else { -#line 4132 - CError_FATAL(); + CError_FATAL(4132); } } } @@ -2558,8 +2526,7 @@ void CodeGen_GetAsmEffects(Statement *stmt, IAEffects *effects) { break; } -#line 4151 - CError_ASSERT(effects->numoperands <= 16); + CError_ASSERT(4151, effects->numoperands <= 16); } if ((info->flags & (fPCodeFlag1 | fPCodeFlag8)) && (SInt32)effects->numlabels == 0) |