diff options
Diffstat (limited to 'compiler_and_linker/unsorted/InstrSelection.c')
| -rw-r--r-- | compiler_and_linker/unsorted/InstrSelection.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/compiler_and_linker/unsorted/InstrSelection.c b/compiler_and_linker/unsorted/InstrSelection.c index e49437f..359c980 100644 --- a/compiler_and_linker/unsorted/InstrSelection.c +++ b/compiler_and_linker/unsorted/InstrSelection.c @@ -534,7 +534,7 @@ void gen_DIV(ENode *expr, short outputReg, short outputRegHi, Operand *output) { if (is_unsigned(type)) { if (ENODE_IS(right, EINTCONST) && (tmp = ispowerof2(right->data.intval.lo))) { shift_right_immediate(left, type, tmp, outputReg, output); - } else if (!copts.optimize_for_size && ENODE_IS(right, EINTCONST) && right->data.intval.lo != 1) { + } else if (!copts.optimizesize && ENODE_IS(right, EINTCONST) && right->data.intval.lo != 1) { SInt32 value; int tmpreg1; int tmpreg2; @@ -590,7 +590,7 @@ void gen_DIV(ENode *expr, short outputReg, short outputRegHi, Operand *output) { signed_divide_by_power_of_2(left, tmp, 0, outputReg, output); } else if (ENODE_IS(right, EINTCONST) && (tmp = ispowerof2(-right->data.intval.lo))) { signed_divide_by_power_of_2(left, tmp, 1, outputReg, output); - } else if (!copts.optimize_for_size && ENODE_IS(right, EINTCONST) && (value = right->data.intval.lo) != 1u && value != -1) { + } else if (!copts.optimizesize && ENODE_IS(right, EINTCONST) && (value = right->data.intval.lo) != 1u && value != -1) { int tmpreg2; int tmpreg3; int tmpreg1; @@ -664,7 +664,7 @@ void gen_MODULO(ENode *expr, short outputReg, short outputRegHi, Operand *output shift_and_mask(left, 0, 32 - tmp, 31, outputReg, output); else signed_mod_by_power_of_2(left, tmp, 0, outputReg, output); - } else if (!copts.optimize_for_size && ENODE_IS(right, EINTCONST) && (value = right->data.intval.lo) != 1u && value != -1) { + } else if (!copts.optimizesize && ENODE_IS(right, EINTCONST) && (value = right->data.intval.lo) != 1u && value != -1) { GEN_NODE(left, &op1); ENSURE_GPR(&op1, left->rtype, 0); @@ -2463,7 +2463,7 @@ static void signed_divide_by_power_of_2(ENode *expr, int shift, int negate, shor memclrw(&op, sizeof(Operand)); GEN_NODE_TO_GPR(expr, &op, expr->rtype, 0); - if (!copts.optimize_for_size && shift == 1) { + if (!copts.optimizesize && shift == 1) { tmpreg1 = ALLOC_GPR(); emitpcode(PC_RLWINM, tmpreg1, op.reg, 1, 31, 31); tmpreg2 = ALLOC_GPR(); @@ -3054,7 +3054,7 @@ void gen_condition_gpr(ENode *cond, Operand *output, short outputReg) { } if (IS_INT_CONST_ZERO(right)) { - if (copts.optimize_for_size) { + if (copts.optimizesize) { tmpReg = ALLOC_GPR(); emitpcode(PC_ADDIC, tmpReg, op1.reg, -1); finalReg = outputReg ? outputReg : ALLOC_GPR(); @@ -3072,7 +3072,7 @@ void gen_condition_gpr(ENode *cond, Operand *output, short outputReg) { return; } - if (copts.optimize_for_size) { + if (copts.optimizesize) { tmpReg = ALLOC_GPR(); emitpcode(PC_SUBF, tmpReg, op1.reg, op2.reg); tmpReg2 = ALLOC_GPR(); @@ -3109,7 +3109,7 @@ void gen_condition_gpr(ENode *cond, Operand *output, short outputReg) { case ELESSEQU: if (is_unsigned(left->rtype)) { - if (copts.optimize_for_size) { + if (copts.optimizesize) { tmpReg = ALLOC_GPR(); emitpcode(PC_LI, tmpReg, -1); tmpReg2 = ALLOC_GPR(); @@ -3184,7 +3184,7 @@ void gen_condition_gpr(ENode *cond, Operand *output, short outputReg) { output->optype = OpndType_GPR; output->reg = finalReg; } else { - if (copts.optimize_for_size) { + if (copts.optimizesize) { tmpReg = ALLOC_GPR(); emitpcode(PC_SUBFC, tmpReg, op2.reg, op1.reg); tmpReg2 = ALLOC_GPR(); @@ -3368,7 +3368,7 @@ void gen_negated_condition_gpr(ENode *cond, Operand *output, short outputReg) { } if (IS_INT_CONST_ZERO(right)) { - if (copts.optimize_for_size) { + if (copts.optimizesize) { tmpReg = ALLOC_GPR(); emitpcode(PC_ADDIC, tmpReg, op1.reg, -1); finalReg = outputReg ? outputReg : ALLOC_GPR(); @@ -3386,7 +3386,7 @@ void gen_negated_condition_gpr(ENode *cond, Operand *output, short outputReg) { return; } - if (copts.optimize_for_size) { + if (copts.optimizesize) { tmpReg = ALLOC_GPR(); emitpcode(PC_SUBF, tmpReg, op2.reg, op1.reg); tmpReg2 = ALLOC_GPR(); @@ -3459,7 +3459,7 @@ void gen_negated_condition_gpr(ENode *cond, Operand *output, short outputReg) { } if (IS_INT_CONST_ZERO(right)) { - if (copts.optimize_for_size) { + if (copts.optimizesize) { tmpReg = ALLOC_GPR(); emitpcode(PC_SUBFIC, tmpReg, op1.reg, 0); finalReg = outputReg ? outputReg : ALLOC_GPR(); @@ -3477,7 +3477,7 @@ void gen_negated_condition_gpr(ENode *cond, Operand *output, short outputReg) { return; } - if (copts.optimize_for_size) { + if (copts.optimizesize) { tmpReg = ALLOC_GPR(); emitpcode(PC_SUBF, tmpReg, op2.reg, op1.reg); tmpReg2 = ALLOC_GPR(); |